keep an eye on this bugreport.
https://bugs.libre-soc.org/show_bug.cgi?id=698
Professor Galayko who designed the PLL has confirmed that the PLL is functional, and is currently designing a test PCB.
we keep putting in NLnet proposals, they are all tracked publicly here, if you’d like to help then there is plenty to do (and receive donations from NLnet for doing so) https://libre-soc.org/nlnet_proposals/