https://libre-riscv.org/nlnet_proposals/
I am putting in a series of funding proposals, each for EUR 50,000 for different related subtasks in order to make progress with the Libre RISC-V SoC. These are:
- a second Vulkan 3D driver, which will be a port of AMDVLK. similar to swiftshader, for the Libre RISCV SoC, except taking into account the Vectorisation, predication and custom accelerated opcodes.
- a video acceleration initiative: with NEON assembler being up to the job of decoding 720p video on recent ARM64 processors, the idea is to design instructions that will do the job and then follow through getting the code upstream.
- two related proposals which, in combination, will result in an actual 180nm ASIC being taped out at TSMC.
- a formal mathematical proof of the hardware design, proving inviolate guarantees of its correctness. this because although auditing the code is possible, it is both laborious, error prone, and could be compromised. mathematical proofs may be run by anyone and are inviolate.
- an augmentation of gcc to support the processor’s parallel and vectorisation capabilities.
The reasons why I am posting these here are:
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We need a European Citizen to be part of the proposal process. They do not have to be resident, they just have to be an EU Citizen. Including the UK. There is no obligation or contract.
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We are looking for individuals and Universities willing to receive donations directly from NLNet for the purposes of completing any of the tasks, in any of the proposals. Corporations may not be recipients of Charitable Donations, however their employees may.
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I would love to hear from anyone any additional ideas for funding proposals. However bear in mind the criteria, here, http://nlnet.nl/PET
We do not have long! The current round ends Oct 1st. With thanks.