apologies, it has been a while, our team has been very busy. quick back of envelope figures: DDR4 PHY, $1m per 32 bit interface. PCIe around USD 250k, USB3 likely around the same. 28nm production mask charges around USD $1m and it doubles for each half-node drop ($2m for 22nm)
the solution to the cost of doing an ASIC is: partnerships. and multiple markets. typical SoCs in no way are done for just one purpose (unless there are customers willing to order QTY 5 million for e.g. TV STBs) so they are designed for 10 to 15 different markets where multiple 50k and 100k orders from completely different OEMs will cover the NREs (Non-Recurring Expenses).
so it’s doable: there just has to be collaboration rather than competition.
indeed. and with NVIDIA hell bent on buying ARM, against the wishes and advice of its Founder, after Softbank already jacked up royalties by USD 1.50 (the Allwinner A64 only sells for USD 4 including the PMIC) you can see pretty clearly where that’s going.
hey, if they want to fight amongst themselves, let them see how far it gets them. i have no problem approaching VCs with a story that, based on how things went with Imagination Technologies buying then fire-selling MIPS, explains why there’s a real opportunity to do things differently.
as someone else mentioned, the IBM POWER9 is high end. it’s 200W per processor. desktop systems are available in the form of the TALOS-II and hoo-boy do they do the job. yes, really, people do buy them as a desktop unit.
LibreSOC http://libre-soc.org which is the project i am heading is going after the area that IBM can’t. the 2.5 to 3.5 watts “Pi” style market, a la Allwinner A64 and Rockchip RK3399. except, due to a request from a customer we want to include ECC LPDDR4/DDR4. you will have seen Linus’s latest rant at Intel for holding things back, there, propagating Rowhammer.
LibreSOC is a hybrid 3D GPU-VPU-CPU. Similar to how the Sony PS3 Cell processor worked, except rather than dedicated custom sub-processors that require special software, we are developing, under the watchful eye of the OpenPOWER Foundation, a new 3D and Video augmentation of the OpenPOWER ISA, pretty similar in concept to the RV64X initiative except full SMP capable. In other words rather than shipping the Shader GPU binary off to a separate set of cores it gets executed on the main core(s), right there, right then, just like any other userspace multithreaded application.
that drastically simplifies driver development, allows direct single-step debugging from the application straight into the Vulkan driver, cutting out the insanity and reducing 3D execution latency in the process (queues of 100,000 tasks to foreign arch GPUs is not uncommon)
the ISA augmentation on its own is a huge task so if anyone would like to help here is the starting point
the other fascinating thing about what we are doing is that if both PCIe host and client as well as USB3 and HDMI are included in the same SoC, then it can not only be the basis of a Pi style SBC it can be the basis of a 3D Graphics Card and a DisplayLink-style USB Video adapter. this is what i meant by intelligently targetting different areas, amortising the NREs across multiple customers.