I don’t think so. They investigated the MX MINI as an alternative early this year because of the power consumption problems with the MX.
They only possibility would be if they hit some major problems with the MX but then they wouldn’t be launching the phone with it, would they?
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Any way we cant make right choice now without actual information about this words: “14nm Next Generation CPU”
PS. I replace my conclusion in prevision post
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I would be willing to wait for batch fir if it’s the i.MX 8M Quad with a 14nm process. The mini doesn’t seem worth the loss in video functionality.
Dedicated video acceleration saves power more often than not.
I guess that “14nm Next Generation CPU” translation within NXP dictionary would be “Nano” and therefore the whole wording here would be the one (Quad) from the new “NXP i.MX8 Nano” processor family supporting the new Platform Security Architecture (PSA) Certification.
Why are you talking about nano and mini? i never saw a newest version of a thing to be less powerfull than the previous version.
I hope @todd-weaver or @nicole.faerber will say something more about that since we must make a choice before shipment
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No, we are not talking about the Nano there.
We know, from unofficial talks with NXP, that they will release a successor of the i.MX8M Quad sometime next year, likely beginning of next year, which will get the updated silicon process and some other feature upgrades, but it will be downward feature compatible with the i.MX8M Quad - so no regression, only improvements in many ways. We do not yet know how this will be called etc. and even if we knew, we would not be able to share this information (yet).
Cheers
nicole
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Thank you very much nicole that’s what i was hoping for
Features Comparison Chart for i.MX 8 Series and Layerscape® LS 1012A and LS1028A Processors
Only for information about difference of published CPUs with 4x cores:
| Features | i.MX 8M Quad | i.MX 8M Mini Quad | i.MX 8M Nano Quad |
|---|---|---|---|
| 4xCPU Cortex®-A53 | 1.5GHz | 1.8GHz | 1.5GHz |
| Cache L2, On-chip RAM |
1MB ECC, 160KB |
512KB ECC, 256KB |
512KB ECC, 512KB |
| CPU (1xCortex-M) | M4@266 MHz | M4@400 MHz | M7@600 MHz |
| External Memory Interfaces | 1x16LPDDR4-2400, DDR3L-1866, 1x32LPDDR4-3200, DDR4-2400, DDR3L-1600, 2xQuadSPI, 8-bit NAND, 16/32-bit NOR |
1x32LPDDR4-3000, DDR4-2400, DDR3L-1600, 2xQuadSPI, 8-bit NAND, 16/32-bit NOR |
1x16LPDDR4-3200, DDR4-2400, DDR3L-1600, 2xQuadSPI, 8-bit NAND, 16/32-bit NOR |
| eMMC/ SDIO |
2×eMMC 5.0/ SD 3.0 |
3×eMMC 5.1/ SDIO 3.0 |
3×eMMC 5.1/ SDIO 3.0 |
| PCI Express | 2xPCIe 2.0 with L1 low-power substate and PHY (1-lane) | 1xPCIe 2.0 with L1 low-power substate and PHY (1-lane) | No |
| Display Interface | 1xHDMI 2.0a (ARC/eDP), 1xMIPI-DSI (4-Lane) | 1xMIPI-DSI (4-Lane) | 1xMIPI-DSI (4-Lane) |
| LCD Resolution | 1x4Kp60 HDR and 1x1080p60 | 1x1080p60 | 1x1080p60 |
| Hardware Video Acceleration | up to 4Kp60 HEVC H.265, VP9 with HDR Dolby Vision® decode*; software encode on Cortex-A-53 |
1080p60 HEVC/H.265, VP9, VP8, H.264 decode*; 1080p60 H.264, VP8 encode* |
No |
| Digital Audio Interface | 4xSAI (2Tx + 2Rx external I2S lanes, 32-bit up to 192 KHz), 1xESAI/MQS, 1xS/PDIF Tx/Rx, 2xASRC |
6xSAI (10Tx + 14Rx external I2S lanes): Each lane up to 24.576 MHz BCLK (32-bit, 2-ch. 384 KHz, up to 32-ch. TDM); DSD512 |
5xSAI (12Tx + 16Rx external I2S lanes): Each lane up to 24.576 MHz BCLK (32-bit, 2-ch. 384 KHz, up to 32-ch. TDM); DSD512 4Tx + 4Rx support 49.152 MHz BCLK for 768 KHz; 8-ch. PDM digital microphone input |
| Hardware 2D/3D Graphics Acceleration | 1xGC7000Lite (4shader) OpenGL ES 3.1, Vulkan,OpenCL 1.2 |
1xGCNanoUltra 3D (1shader) OpenGL ES 2.0, 1xGC328 2D |
1xGC7000UltraLite (2shaders) OpenGL ES 3.1, Vulkan, OpenCL 1.2 |
| Camera Sensor Interface (CSI) | 2xMIPI-CSI (4-Lane, 1.5 Gbit/lane) | 1xMIPI-CSI (4-Lane, 1.5 Gbit/lane) | 1xMIPI-CSI (4-Lane, 1.5 Gbit/lane) |
| Universal Asynchronous Reciever/ Transmitter (UART) | 5xUART (5Mbps) | 4xUART (5Mbps) | 4xUART (5Mbps) |
| USB Controller | 1 × USB 3.0/2.0 with PHY(OTG), 1 × USB 2.0 with PHY (OTG) |
2xUSB 3.0/2.0 (OTG) Type C with PHY | 2xUSB 2.0 (OTG) with PHY |
| Power Management | PMIC PF4210 | PMIC | PMIC |
| Package | 17x17 FC-BGA (621) 0.65 mm pitch | 14x14 FC-BGA 0.5 mm pitch (depopulated) *pincompatible with i.MX 8M Nano 14x14 package | 14x14 FC-BGA 0.5 mm pitch (depopulated) *pincompatible with i.MX 8M Mini 14x14 package |
| Process | 28 nm HPC | 14 nm LPC FinFET | 14 nm LPC FinFET |
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On the contrary. Indeed, we can. If they get the 14nm processor, it’s gonna be faster and more efficient. That’s why it says “next generation”. That’s the pattern with all flagship chipsets in the world. Smaller, faster & more power efficient.
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current-generation is 7nm for AMD and next-generation would be 5nm or less. 14nm is a few years old already especially in the mobile-space but if it’ll be better heat/energy manged i would not care if it’s 28nm still. what matters is if it’s 100% (or getting closer) free-software.
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Thanks @nicole.faerber for confirming that it will be an improved i.MX 8M Quad and not a low-powered i.MX 8M mini. I suspected, but it is nice to have it confirmed, rather than letting us endlessly speculate.
I’m would love to see an NXP mobile chip that can compete with the upcoming Rockchip RK3358, but mobile phones simply aren’t their target audience. Maybe if the Librem 5 has a 1 million orders, NXP can be convinced to make some high-powered mobile processors.
I agree. The RK3358 has 4x Cortex-A76 and 4x Cortex-A55 cores but I wish we will have for Librem 5 v2 just 4x Cortex-A55 cores. And, as you @amosbatto suggested within your link, the new DynamIQ multi-core scheme might be included with the Quad Cortex-A55 processor. Maybe I am just dreaming here, but don’t get me wrong as I am anyway looking forward what NXP eventually (in February 2020) might offer as a compatible “that can compete” mobile chip for the next Librem 5.
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Their newspost says: “Mechanical Design: Version 2”, which seems to suggest that the case will be different.
“revised” 
So what does that mean? Can revised cases not change dimensions?
It could. But why? Channing alot would mean incompatibility with old parts and more R&D cost for what to gain? I would only see major changes in design coming i there are major issues with the v1 design coming up in 2020 which haven’t been foreseen now. The Librem13/15 case haven’t changed much either.
Only reason i can think of why there could be a major revision would be that they decided to have nfc and quick charge and know they have to drop metal casing in the future but it’s to late for v1 so they planing already for the change. Or the additional time needed for a slimmer design.
But i think this i over interpretation of this. I think it’s them just saying, for that version we might change things as there was enough time to find the areas which could be improved and we might have the time to address them. It’s just that no one is upset that there is a new improved version so close after the first.
It’s the transparency they give on the fact the L5 will be constantly improved and the later you by the more improvements you get.
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Is it this series of GPU?
Vega shader cores? Is it actually an AMD graphics component?
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Here is what might be easily confirmed:
Vega 1× (?):
• i.MX 8M Quad (28nm HPC) = GC7000Lite 3D GPU (4 shaders), OpenGL ES 1.1, 2.0, 3.0, 3.1, Vulkan, OpenCL 1.2 – 267 million triangles/sec – 1.6 Giga pixel/sec – 32 GFLOPs 32-bit or 64 GFLOPs 16-bit
Vega-Lite (?):
• i.MX 8M Plus (14nm LPC FinFET) = GC7000UltraLite 3D GPU (2 shaders), OpenGL ES 2.0, 3.0, 3.1, Vulkan, OpenCL 1.2; GC520 (2D) – similar to Marvell Armada PXA1908 (28nm) + GC520 (2D)
• i.MX 8M Mini (14nm LPC FinFET) = GC NanoUltra 3D GPU (1 shader), OpenGL ES 2.0; GC328 (2D) – modern smartphone usable?
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Increase the battery capacity to 6k mAh in Librem 5 Fir/EvergreenCompat to fulfill the demand on true gnu-mobile-device.