From my experience working with chips (I have only did simulations, never taped down). One generation of fabrication processes gives you ~30% power saving given the same design, minor clock boost and ~25% better density.
AFAIK, the standard A53 core design can never go above 1.8GHz (on modern process, due to it’s relatively few pipeline stages and long critical paths). And, the A53 core’s area can grow 30% from a low power design (~1.2GHz) to a high frequency design (~1.5GHz).
So, assume NXP didn’t go nuts with their layout. They can either build a smaller and less power hungry chip with the same design. Or they can build one with a higher frequency but same power efficiency and space. (Or they could put more devices on the chip)
Just my experience working in academia. I might be horribly wrong.